Method for controlling the sampling direction, sequence and position of color data in a frame memory in a color video line printer

ABSTRACT

A printing control method for a video color printer includes the steps of: changing sampling direction so that a line memory inputs column samples among one frame data of a frame memory whenever printing is completed; sequentially designating one column sample position from left to right or vice versa according to the direction designated in the sampling direction changing step whenever one frame data is read out from said frame memory; and designating the position of unit samples so that said line memory sequentially inputs the column samples designated in the column sample designating step whenever one horizontal scan line data is read out. The method is advantageous in preventing paper&#39;s curl and dislocation of color by controlling an enabling signal of the line memory in a video color printer to allow reciprocative printing.

BACKGROUND OF THE INVENTION

The present invention relates to a printing control method forcontrolling an enable signal of a line memory so as to allowreciprocative printing in a video printer.

A video printer is to print a picture recorded by the instant capture ofa video signal, or a picture recorded by a recorder such as a stillcamera and reproduced on a monitor.

Referring to FIG. 1, video decoder 10 of a video color printer separatesthe R, G, and B analog signals from a video signal input from videoinput port 5, and the horizontal and vertical synchronous H-sync andV-sync signals. Upon receiving a memory instruction signal from memoryinstruction input port 15, memory controller 70 supplies a samplingpulse to analog-to-digital converter 20 corresponding to the separatedH-sync and V-sync signals. Analog-to-digital converter 20 converts theR, G, and B analog signals from decoder 10 to R, G, and B digitalsignals corresponding to the sampling pulse from memory controller 70.Frame memory 30 stores the R, G, and B signals from analog-to-digitalconverter 20 in a storage location corresponding to a write addressdesignated by memory controller 70. Upon receiving an instruction inputsignal from print instruction input port 25, a printing controller 80simultaneously applies a read address to frame memory 30, designates awrite address in line memory 31, and selects a memory selection switch.

Meanwhile, R, G, and B signals should be converted to yellow Y, cyan Cand magenta M in order to be printed on paper. The R, G, and B signalsrecorded in frame memory 30 are sequentially recorded in line memory 31by lines by memory selection switch 40, and the data recorded in linememory 31 is transmitted to controller 50 by printing controller 80.Controller 50 converts the R, G, and B signals from line memory 31 to Y,M, and C signals sequentially and at the same time, performs colorcorrection and resistance correction to reduce the resistive deviationof each heat generating element of a printing head in order tocompensate the error of density conversion in accordance with thecorrelation between the properties of the paper used and amount of heatgenerated by a head, then, applies the converted and compensated Y, M,and C data to the printing head of printing portion 60 in the sequenceof Y, M, and C. The data is printed by lines by the printing head ofprinting portion 60, which is the completion of one frame printing.

Digital-to-analog converter 21 converts the R, G, and B digital signalsof frame memory 30 to R, G, and B analog signals and supplies them toencoder 90. Encoder 90 converts the R, G, and B signals converted bydigital-to-analog converter 21 to a composite video signal and suppliesit to monitor 100. While the one frame picture is being printed by theprinting portion, monitor 100 displays the picture which is beingprinted.

In addition, a printing head of printing portion 60 prints by lines fromleft to right because the number of vertical sampling is constant butthe number of horizontal sampling is variable. Thus, line memory 31stores one column data during reading out of one frame data from framememory 30. At this time, printing controller 60 should generate a writeenabling signal in order that line memory 31 stores the one column dataamong one frame data of frame memory 30.

Referring to FIG. 2, frequency divider 110 divides by two a verticalsynchronous signal input via vertical synchronous signal input port 105and supplies the two-divided vertical synchronous signal to up-counter120. Whenever the vertical synchronous signal divided by two byfrequency divider 110 is input to a clock port CLK, up-counter 120counts a value by increasing it by "1", and supplies the counted valueto the input port D of down-counter 130. Down-counter 130 inputs thecounted value from up-counter 120 during the horizontal blanking periodof a horizontal synchronous signal input via a horizontal synchronoussignal input port 115. Whenever a clock signal is applied via clock port125 during the horizontal scan period of a horizontal synchronoussignal, down-counter 130 counts the input values by decreasing it by "1"until the input value becomes "0", and applies a write enabling signalin a predetermined logic state to line memory 31.

Therefore, when the output of up-counter 120 is "1", data (1, L1), (2,L1), (3, L1), . . . , (525, L1) of first column in FIG. 3 is applied andprinted in printing portion 7. When the output of up-counter 120 is "2",data (1, L2), (2, L2), (3, L2), . . . , (525, L2) of second column isprinted in printing portion 7. According to the sequence, as data (1,L600), (2, L600), (3, L600), . . . , (525, L600) of 600th column isprinted, printing of one color is completed.

As printing of one color is completed, a platen drum is rotated twotimes faster to make paper return to the initial position. Then,printing is carried out again to sequentially print yellow, magenta, andcyan in the same direction, then printing is completed.

As described above, after the completion of printing, the ordinaryprinting controller rotates the platen drum two times faster to makepaper return to the initial position. Then, printing begins again. Ifpaper is wound on the drum, the one-direction printing may causedislocation of color because of paper's curl and incorrect initialsetting.

SUMMARY OF THE INVENTION

Therefore, it is an object of the present invention to provide aprinting control method for preventing paper's curl and incorrectinitial setting.

To accomplish the object, in a video color printer comprising a framememory for storing one frame color signals, and repeatedly reading outthe stored color signals from left to right and from top to bottom, aline memory for storing one column color signal whenever one frame colorsignals are read out from the frame memory, and a printing means forprinting the color signals stored in the line memory, the printingcontrol method of the present invention comprises the steps of: changingsampling direction so that the line memory inputs column samples amongone frame data of the frame memory whenever printing is completed;sequentially designating one column sample position from left to rightor vice versa according to the direction designated in the samplingdirection changing step whenever one frame data is read out from theframe memory; and designating the position of unit samples so that theline memory sequentially inputs the column samples designated in thecolumn sample designating step whenever one horizontal scan line data isread out.

BRIEF DESCRIPTION OF THE DRAWINGS

The above object and other advantages of the present invention willbecome more apparent by describing in detail a preferred embodiment ofthe present invention with reference to the attached drawings in which:

FIG. 1 is a block diagram of a video color printer;

FIG. 2 is a detailed circuit diagram of an enabling signal generator foruse of a line memory of the printing controller shown in FIG. 1;

FIG. 3 illustrates the relation between picture scanning of a videosignal and sampling location of a printing line;

FIG. 4 is a detailed circuit diagram of an enabling signal generator fora line memory in accordance with the present invention; and

FIGS. 5A through 5D are waveforms present at various stages of thecircuit shown in FIG. 4.

DETAILED DESCRIPTION OF THE INVENTION

Referring to FIG. 4, first input port 205 is coupled to decoder 10 shownin FIG. 1 to input a vertical synchronous signal. First input port 205is coupled to the input port of frequency divider 210. The output portof frequency divider 210 is coupled to clock port CLK of up-down counter220. Output port Q of up-down counter 220 is coupled to input port D ofdown-counter 230. Output port Q of down-counter 230 is coupled to outputport 255. Output port 255 is coupled to a write enabling port (notshown) of line memory 31 shown in FIG. 1. To input a print completionsignal, second input port 215 is coupled to printing portion 60 shown inFIG. 1 or a microcomputer (not shown) for controlling the whole system.Second input port 215 is coupled to clock port CLK of flip-flop 241, andone input port of OR gates 242 and 243. Noninverting output port Q offlip-flop is coupled to the other input port of OR gate 242, input portof inverter 244, and up/down control port U/D of up-down counter 220.The output port of inverter 244 is coupled to the other input port of ORgate 243. The output port of OR gate 242 is coupled to clear port CLR ofup-down counter 220. The output port of OR gate 243 is coupled to loadport LD of up-down counter 220. Flip-flop 241 has a feedback loop whichis connected from inverting output port *Q to input port D. Third inputport 225 is coupled to an initial value setting portion (not shown) or amicrocomputer (not shown) in order to input a preset value whichdesignates a sample at the horizontally right end. Third input port 225is coupled to input port D of up-down counter 220. Fourth input port 235is coupled to decoder 10 shown in FIG. 1 to input a horizontalsynchronous signal. Fourth input port 235 is coupled to load port LD ofdown-counter 230. Fifth input port 245 is coupled to a clock source toinput a clock signal. Fifth input port 245 is coupled to the clock portCLK of down-counter 230.

FIG. 5A is a waveform of a print completion signal supplied to secondinput port 215, FIG. 5B is a waveform of an output signal outputted fromnoninverting output port Q of flip-flop 241, FIG. 5C is a waveform of anoutput signal of OR gate 242, and FIG. 5D is a waveform of an outputsignal of OR gate 243.

Detailed descripton of the present invention follows with reference toFIGS. 1 and 3 through 5C.

Turning to FIG. 4, frequency divider 210 frequency-divides a verticalsynchronous signal inputted via first input port 205, and generates atwo-divided vertical synchronous signal. While outputting an up-downmode control signal in high logic state via noninverting output port Q,flip-flop 241 inverts the up-down mode control signal in high logicstate of noninverting output port Q to a signal in low logic state asshown in FIG. 5B, when a print completion signal in the low logic stateas shown in FIG. 5A is applied to clock port CLK via second input port215. OR gate 242 logically sums the up-down mode control signal in lowlogic state from noninverting output port Q of flip-flop 241, and theprint completion signal from second input port 215, and generates thelogic signal as shown in FIG. 5C. Up-down counter 220 resets an outputvalue to "0" by the logic signal in low logic state applied to clearport CLK from OR gate 242. While the up-down mode control signal in lowlogic state is applied from noninverting output port Q of flip-flop 241to an up-down control port, up-down counter 220 counts a value accordingto the two-divided vertical synchronous signal applied fromfrequency-divider 210 to clock port CLK, and generates count valueswhich increase by "1" from "0" to "600". Whenever a horizontalsynchronous signal is applied to load port L/D via fourth input port235, down-counter 230 inputs the counted values from up-down counter 220via input port D. Down-counter 230 counts the counted values inputted bya clock signal applied to clock port CLK via fifth input port 245 bydecreasing by "1", then, generates a write enabling signal in low logicstate when the count value becomes "0". The write enable signalgenerated from down-counter 230 is supplied to line memory 31 shown inFIG. 1 via output port 255. When the count value of up-down counter 220is "1", line memory 31 shown in FIG. 1 inputs data of samples (1, L1),(2, L1), (3, L1), . . . , (525, L1) of FIG. 3 according to the writeenable signal generated from down-counter 230 shown in FIG. 4, andsupplies the data to printing portion 60 via controller 50. Then,printing portion 60 prints L1 column data of line memory 31 inputted viacontroller 50. When the count value of up-down counter 220 shown FIG. 4is "2", line memory 31 shown in FIG. 1 inputs data of samples (1, L2),(2, L2), (3, L2), . . . , (525, L2) of FIG. 3, and printing portion 60prints L2 column data. According to the sequence, print portion 60prints data until the L600 column to complete the printing of one color.

Meanwhile, in FIG. 4, while outputting the up-down mode control signalin low logic state via noninverting output port Q, flip-flop 241 invertsthe up-down mode control signal in low logic state of noninvertingoutput port Q to a signal in high logic state as shown in FIG. 5B, whena print completion signal in low logic state as shown in FIG. 5A isapplied to clock port CLK via second input port 215. OR gate 243logically sums the up-down mode control signal in high logic state fromnoninverting output port Q of flip-flop 241 inputted via inverter 244,and the print completion signal from second input port 215, and thengenerates a logic signal as shown in FIG. 5D. Up-down counter 220 setsan output value to "600", the preset value of third input port 225,according to the logic signal in a low logic state applied from OR gate243 to load port LD. While the up-down mode control signal in a highlogic state is applied from noninverting output port Q of flip-flop 241to up-down control port U/D, up-down counter 220 counts a value bydecreasing it by " 1" according to the two-divided vertical synchronoussignal applied from frequency-divided 210 to clock port CLK, andgenerates counted values which decrease by "1" from "600" to "0".Down-counter 230 inputs the counted values from up-down counter 220 viainput port D whenever a horizontal synchronous signal is applied to loadport L/D via fourth input port 235.

Down-counter 230 counts the count values by decreasing it by "1"according to the clock signal applied to clock port CLK via fifth inputport 245. When the counted value becomes "0", down-counter 230 generatesa write enable signal in a low logic state. The write enable signalgenerated from down-counter 230 is supplied to line memory 31 shown inFIG. 1 via output port 255. When the count value of up-down counter 220becomes "600", line memory 31 shown in FIG. 1 inputs data of samples (1,L600), (2, L600), (3, L600), . . . , (525, L600) in FIG. 3 according tothe write enable signal from down-counter 230 shown in FIG. 4, andsupplies the data to printing portion 60 via controller 50. Then,printing portion 60 prints the L600 column data from line memory 31inputted via controller 50. When the counted value of up-down counter220 shown in FIG. 4 becomes "599", line memory 31 shown in FIG. 1 inputsdata of samples (1, L599), (2, L599), (3, L599), . . . , (525, L599) ofFIG. 3, and printing portion 60 prints the L599 column data. Accordingto the sequence, printing portion 60 prints data until L1 column tocomplete the printing of another color. As mentioned above, the countmode and initial value of up-down counter 220 can be changed to allowreciprocative printing.

As described above in detail, the present invention is advantageous inpreventing paper's curl and dislocation of color by controlling anenable signal of a line memory in a video color printer to allowreciprocative printing.

While the invention has been particularly shown and described withreference to preferred embodiments thereof, it will be understood bythose skilled in the art that various changes in form and details may bemade therein without departing from the spirit and scope of theinvention as defined by the appended claims.

What is claimed is:
 1. In a video color printer comprising a framememory for storing data corresponding to color signals of one imageframe, and repeatedly reading out the stored data from left to right andfrom top to bottom, a line memory for storing of data corresponding to acolor signal whenever one frame of data is read out from the framememory, and a printing means for printing the data stored in the linememory, a printing control method comprises the steps of:changing asampling direction so that said line memory inputs column data samplesfrom one frame of data stored in said frame memory whenever printing iscompleted; sequentially designating one column data sample position fromleft to right or vice versa according to the sampling directiondesignated in the sampling direction changing step whenever one frame ofdata is read out from said frame memory; and designating the position ofcolumn data samples so that said line memory sequentially inputs columndata samples of the column designated in the sequential designatingwhenever one horizontal scan line of data is read out from said framememory.
 2. A printing control method as claimed in claim 1, wherein thestart position of line samples is also designated when the samplingdirection is changed in said sampling direction changing step.